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| CFS33xx Model 9x14 mm SMD, 3.3V, CMOS Frequency Range: Frequency Stability: Temperature Range: (Option M) (Option E) Storage: Input Voltage: Input Current: 1.544~34.00MHz 35.00~50.00MHz 51.00~69.00MHz 70.00~156.25 MHz Standby Current Output: Symmetry: Rise/Fall Time: 1.54~10.00 MHz 10.10~30.00 MHz 30.10~50.00 MHz 50.10~80.00 MHz 80.10~156.25 MHz Logic: Start-up Time: Load: Jitter RMS: 12KHz~80MHz Aging: 1.544MHz to 156.250MHz 20ppm to 100ppm 0C to 70C -20C to 70C -40C to 85C -55C to 120C 3.3V 0.3V 18mA Max 25mA Max 30mA Max 45mA Max 3uA Typ., 10uA Max CMOS 45/55% Max @ 50% Vdd ree dF ea oHS nt L R plia m Co Clock Oscillator With Standby Mode 5ns Max @ 20/% to 80% 4ns Max @ 20/% to 80% 3ns Max @ 20/% to 80% 2.5ns Max @ 20/% to 80% 2ns Max @ 20/% to 80% "0" = 10% Vdd Max "1" = 90% Vdd Min 5ms Max 30pF Max, >80MHz 15pF Max 0.5ps Typ, 1ps Max <3ppm 1st/yr, <1ppm every year thereafter The CFS33xx Series utilizes fundamental and 3rd overtone crystal technology to provide a low jitter output frequency. The oscillator is equipped with power saving standby feature for battery and other low drain applications. Available on tape and reel in quantities of 500ea. SUGGESTED PAD LAYOUT 0.560 (14.2) 0.040 (1.01) 0.560 (14.2) 0.210 (5.3) 0.050 (1.27) 0.360 (9.14) C P/N DC Frequency 1 4 0.200 (5.08) 2 3 0.070 (1.77) 0.280 (7.11) Bottom View RECOMMENDED REFLOW SOLDERING PROFILE TEMPERATURE 260C 217C 200C 150C Ramp-Up 3C/Sec Max. Critical Temperature Zone Ramp-Down 6C/Sec. 0.090 (2.28) 0.200 (5.08) 0.01uF Bypass Capacitor Recommended Crystek Part Number Guide Example: CFS3392-44.736MHZ Example: CFSM3392-44.736MHZ Example: CFSE3392-44.736MHZ Temperature 0/ 70C CFS3390 CFS3392 CFS3391 CFS3398 Frequency Stability -40/ 85C CFSE3390 CFSE3392 CFSE3391 N/A +/- 100ppm +/- 50ppm +/- 25ppm +/- 20ppm -20/ 70C CFSM3390 CFSM3392 CFSM3391 N/A Preheat 180 Secs. Max. 8 Minutes Max. 90 Secs. Max. 260C for 10 Secs. Max. NOTE: Reflow Profile with 240C peak also acceptable. mA M OUT pin 4 Vdd OUT Standby Function Function pin 1 Open "1" level .7Vdd Min "0" level 0.3Vdd Max Oscillator State Oscillator Active Oscillator Active Oscillator Stopped pin 3 OSC. GND PWR Supply O/P Load incl Probe Cl VM Bypass Cap. pin 1 pin 2 Oscillator Stopped GND or "LOW" Standby Feature: When pin 1 is disabled by applying a logic "0", the output buffer of the oscillator goes into tri-state (high impedance). In addition, the internal oscillator is stopped, hence the entire oscillator consumes less than 10uA from the supply pin. Specifications subject to change without notice. Oscillation OPEN or "HIGH" TD-102703 Rev.C |
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